Highly Reliable Microprocessor


The reliability of electronic systems is a current problem and is extremely important for critical systems.

In particular, in space applications, electronics suffer from radiation and damage to circuits.

The research activity focused on the development of systems to be used in space missions and led to the design and construction of a programmable rad-hard and fault-tolerant device.

The Hirempro project is a redundant processor implemented in MicroSemi’s Rad-Hard FPGA, the multiprocessor architecture allows the use of switched off processors as spare parts to replace processors that can suffer permanent failures due to radiation or other causes.

The redundant processor uses a TMR configuration with cold spare processors.

The replacement of damaged processors occurs automatically and transparently without interruption of the treatment.

Replacement processors are reduced if permanent failures occur; therefore the degradation of the system is progressive!

We have evidence of gradual damage to the system and can take appropriate action when the device is at the end of its life. The processor cannot stop working unexpectedly.


Redundant microcontroller equipped with a spare processing unit.
Fault tolerant device based on a European patented multiprocessor.
Microcontroller suitable for real-time systems.
Implemented in FPGA, also in Rad-Hard version.
Possibility of creating ASICs with RHBD circuits in collaboration with partner companies.
Innovative device capable of overcoming temporary failures (eg SEU, SET) and permanent failures (eg for TID) occurring in the processor circuits.
Possibility of making sturdy tables suitable for particularly severe environmental conditions (due to temperature, humidity, salt spray, vibrations, electromagnetic disturbances, radiation).
Possibility of producing systems with space, avionics, military certifications / qualifications.


Critical control systems in the space, avionics, military, industrial, medical sectors.

Non-maintainable systems

This project is developed thanks to the financial support of the FESR funds.